Hardware video processing algorithms operate on serial data. For information on the serial protocol used in Vision HDL Toolbox™, see Streaming Pixel Interface.
You can simulate hardware-friendly streaming-pixel designs alongside frame-based designs. For instance, use frame-based algorithms, such as those designed using Computer Vision Toolbox™ or Image Processing Toolbox™, to verify a hardware-optimized design. Use the Frame To Pixels and Pixels To Frame blocks to convert video between frame-based and streaming-pixel formats.
|Frame To Pixels||Convert frame-based video to pixel stream|
|Pixels To Frame||Convert pixel stream to frame-based video|
|Pixel Control Bus Creator||Create control signal bus for use with Vision HDL Toolbox blocks|
|Pixel Control Bus Selector||Select signals from control signal bus used by Vision HDL Toolbox blocks|
|Measure Timing||Measure timing of pixel control bus input|
|HV Counter||Count active dimensions of pixel stream|
|Pixel Stream Aligner||Align two streams of pixel data|
|ROI Selector||Select a region of interest (ROI) from pixel stream|
|Pixel Stream FIFO||Buffer input stream to create image lines that have contiguous valid pixels|
|Convert frame-based video to pixel stream|
|Convert pixel stream to frame-based video|
|Measure timing of pixel control structure input|
|Counts active pixel dimensions of streaming video|
|Align two streams of pixel data|
|Select region of interest (ROI) from pixel stream|
Set up a Simulink® model for HDL image and video processing.
This example shows how to design a Vision HDL Toolbox™ algorithm for integration into an existing system that uses the Camera Link® signal protocol.
Data type details of the pixelcontrol bus.
Data type details of the pixel control structure.
This example shows how to convert Camera Link® signals to the
pixelcontrol structure, invert the pixels with a Vision HDL Toolbox™ object, and convert the control signals back to the Camera Link format.