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estimateResources

Class: dlhdl.ProcessorConfig
Package: dlhdl

Return estimated resources used by custom bitstream configuration

Description

example

estimateResources returns the estimated resources used by the custom bitstream configuration.

resources = estimateResources returns a table containing the estimated resources used by the custom bitstream configuration.

estimateResources('Name','Value') returns the estimated resources used by the custom bitstream configuration, with additional options specified by one or more name-value arguments.

resources = estimateResources('Name','Value') returns the estimated resources used by the custom bitstream configuration, with additional options specified by one or more name-value arguments.

Input Arguments

Name-Value Arguments

Specify optional comma-separated pairs of Name,Value arguments. Name is the argument name and Value is the corresponding value. Name must appear inside quotes. You can specify several name and value pair arguments in any order as Name1,Value1,...,NameN,ValueN.

Flag to enable the display of reference design resource utilization specified as alogical data type.

Example: 'IncludeReferenceDesign',true

Output Arguments

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Resources used by the custom bitstream configuration, returned as a table.

Examples

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  1. Create a default custom processor configuration object. Use the dlhdl.ProcessorConfig class.

    hPC = dlhdl.ProcessorConfig;
  2. To retrieve the resources used by the custom processor configuration, call the estimateResources method.

    hPC.estimateResources;
  3. Calling estimateResources returns these results:

                  Deep Learning Processor Estimator Resource Results
    
                                 DSPs          Block RAM*     LUTs(CLB/ALUT)  
                            -------------    -------------    ------------- 
    Available                    2520              912           274080
                            -------------    -------------    ------------- 
    DL_Processor                377( 15%)        508( 56%)     234175( 86%)
    * Block RAM represents Block RAM tiles in Xilinx devices and Block RAM bits in Intel devices
                 

Rapidly prototype the deployment of deep learning networks to your custom board by using the estimateResources function. Estimate the resource utilization of the deep learning processor configuration for your custom board. Optimize the integration of custom IP cores and reference design into your system by using the estimateResources function to estimate the resource utilization of your reference design. The synthesis tool that you use must be in the list of tools supported by the SynthesisTool property of the dlhdl.ProcessorConfig object. For a list of supported tools and device families, see SynthesisTool and SynthesisToolChipFamily.

In this example, estimate the resource utilization for your custom board that has the Kintex® Ultrascale+™ chip family. Also estimate the resource utilization of the reference design for the Xilinx® Zynq® Ultrascale+™ MPSoC ZCU102 board.

Prerequisites

  • Deep Learning HDL Toolbox™

  • Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC

  • HDL Coder™

Estimate Resource Utilization for Kintex® Ultrascale+™ Board

To estimate the resource utilization for your custom board that has a Kintex® Ultrascale+™ chip family , use the estimateResource function of the dlhdl.ProcessorConfig object.

  1. Add the dlhdl_device_registration.m file to the MATLAB® search path.

  2. Create a dlhdl.ProcessorConfig object.

  3. Update the SynthesisToolChipFamily and SynthesisToolDevicename properties of the dlhdl.ProcessorConfig object.

  4. Use the estimateResources function to retrieve the resource utilization for your custom board.

Deep Learning HDL Toolbox™ does not support lookup table (LUT) estimation for custom boards.

hPC = dlhdl.ProcessorConfig;
hPC.SynthesisToolChipFamily = 'Kintex Ultrascale+';
hPC.SynthesisToolDeviceName = 'xcku11p-ffva1156-1-e';
hPC.estimateResources
Warning: Device family "Kintex Ultrascale+" is not currently supported for LUT Estimation. Supported families are Zynq, Zynq UltraScale+ and Arria 10.
              Deep Learning Processor Estimator Resource Results

                             DSPs          Block RAM*     LUTs(CLB/ALUT)  
                        -------------    -------------    ------------- 
Available                    2928              600           298560
                        -------------    -------------    ------------- 
DL_Processor                377( 13%)        508( 85%)          0(  0%)
* Block RAM represents Block RAM tiles in Xilinx devices and Block RAM bits in Intel devices

Estimate Resource Utilization for Custom Reference Design

Estimate the resource utilization for a reference design that you want to integrate into your system that has a Xilinx® Zynq® Ultrascale+™ MPSoC ZCU102 board. Use the estimateResource function with the IncludeReferenceDesign name-value argument. The estimateResources function uses the ResourcesUsed.LogicElements, ResourcesUsed.DSP, and ResourcesUsed.RAM information in the reference design plugin file to perform the resource estimation. To estimate resource utilization for your custom reference design, you must populate your reference design file with values for ResourcesUsed.LogicElements, ResourcesUsed.DSP, and ResourcesUsed.RAM. See ResourcesUsed. The reference design used in this code is located at $supportpackageinstallationfolder/Xilinx/boards/+DLZCU102/+matlab_libiio_3axi4_master_2019_1/plugin_rd.m.

hPC_referencedesign = dlhdl.ProcessorConfig;
hPC_referencedesign.estimateResources('IncludeReferenceDesign',true)
              Deep Learning Processor Estimator Resource Results

                             DSPs          Block RAM*     LUTs(CLB/ALUT)  
                        -------------    -------------    ------------- 
Available                    2520              912           274080
                        -------------    -------------    ------------- 
Total                       380( 16%)        586( 65%)     269176( 99%)
ReferenceDesign               3(  1%)         78(  9%)      35000( 13%)
DL_Processor                377( 15%)        508( 56%)     234175( 86%)
* Block RAM represents Block RAM tiles in Xilinx devices and Block RAM bits in Intel devices

The estimateResources function returns the resource utilization for the reference design and for the deep learning processor configuration.

Supporting Files

Device Registration File

Use the dlhdl_device_registration.m file to register a custom device family. Estimate the resource utilization of the custom device by using the estimateResources function.

type dlhdl_device_registration.m
function hFPGADeviceFamily = dlhdl_device_registration
% Register a new device family by providing the following details:
% 1. Device Family Name 
% 2. Vendor(Intel/Xilinx) 
% 3. DSP Width 
% 4. RAM Width 
% 5. RAM Depth 
% 6. SplitDSP Width(Optional) - alternative DSP Width supported by the DSP macro
% 7. SplitRAM Width(Optional) - alternative RAM Width supported by the RAM macro 

hFPGADeviceFamily = { ...
    kintex_ultrascale();...
    };
end

function hFPGADeviceFamily = kintex_ultrascale()
    % Datasheets :
    % https://www.xilinx.com/support/documentation/user_guides/ug579-ultrascale-dsp.pdf
    % https://www.xilinx.com/support/documentation/user_guides/ug573-ultrascale-memory-resources.pdf
    hFPGADeviceFamily = hdlcoder.FPGADeviceInfo('Name', 'Kintex Ultrascale+');
    hFPGADeviceFamily.Vendor = 'Xilinx';
    hFPGADeviceFamily.DSPWidth = [27, 18];
    hFPGADeviceFamily.RAMWidth = 36;
    hFPGADeviceFamily.SplitRAMWidth = 18;
    hFPGADeviceFamily.RAMDepth = 1024;
end
Introduced in R2021a