From Wireless Standard to Software Defined Radio: An FPGA implementation of an LTE design
Learn how to model and simulate the LTE wireless standard, design for real world impairments (timing, carrier, and channel distortion), and implement the design on a Xilinx® Zynq®-based software-defined radio.
Modeling wireless communications:
- Hardware implementation of OFDM
- Overview of LTE standard (training sequences, LTE resource grid)
- Using real-world recordings to test your design
- Receiver techniques, such as synchronization, carrier recovery, and equalization
Implementing an LTE application on a software-defined radio:
- Hardware/software co-design
- Targeting Xilinx Zynq devices
About the Presenters
As a senior applications engineer, Jeff Miller focuses on supporting customers for adopting HDL code generation and LTE technology. Customer projects have included HDL designs for high performance FFT, FIR, Matrix Mathematics, Encryption, Custom Floating Point, and LTE receivers. Prior to joining MathWorks, Jeff worked at Applied Signal Technology doing Signal Intelligence, and at Morphics Technology doing commercial wireless communications. Jeff has a Master’s of Electrical Engineering from Georgia Tech and a Master’s of Education from the University of Arizona.
Jack Erickson is responsible for product marketing and product management for the HDL product family at MathWorks. Prior to joining MathWorks, he spent over 20 years at Cadence Design Systems, Inc., as an applications engineer and in product marketing for simulation, RTL synthesis, and high-level synthesis. He has a BSEE from Tufts University and an MBA from Worcester Polytechnic Institute.
Recorded: 2 Aug 2018
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