How do i design a synthesizable FFT with Simulink or Matlab for later on FPGA Implementation ?
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I need to take an analog signal, put it through an ADC (1MSPS, 20-Bit) and then transform it on an FPGA to the frequency domain (FFT). I know that there is a "FFT HDL Optimized Block" in Simulink but how do i design the input so that it matches what i want and then generate the hdl code via hdl coder ?
Answers (1)
Bharath Venkataraman
on 14 Jul 2021
1 vote
5 Comments
Youssef Abdelsalam
on 14 Jul 2021
Bharath Venkataraman
on 14 Jul 2021
That depends on what design you are trying to implement on the FPGA. If you are only implementing the FFT on the FPGA, that block is all you need to put in a subsystem and generate HDL code.
Youssef Abdelsalam
on 15 Jul 2021
Bharath Venkataraman
on 15 Jul 2021
Youssef Abdelsalam
on 16 Jul 2021
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