The function block "Integrate and Dump" (Simulink) is not supported for HDL code generation. Is there a similar one which is supported for HDL code generation? Thanks a lot!

I am using HDL coder to convert my simlink design to VHDL code. There is an error generated saying "Integrate and Dump" is not supported for HDL code generation. I am wondering if there is a similar block to "Integrate and Dump" which is supported for HDL code generation. Thanks a lot!

Answer 1

[Bharath Venkataraman]

There isn't a direct single block substiture for the Integrate and Dump block, but the attached model shows the way you can model the behavior using more basic blocks.

[Hong Zhao]

Thanks for the help!

[Hong Zhao]

I have replaced delay3 with rate transition block and it worked out for my project perfectly. Thanks again!

[Bharath Venkataraman]

Glad it worked for you!