How to set simulation time, sampling time, and model parameters in Simulink when using FPGA-in-the-loop

I am working on a simple Simulink model which takes an image as input and does edge detection in the output image. I am using Frames to pixels and pixels to frame blocks of Computer Vision Toolbox and a Sobel filter for edge detection. I am using a subsystem, which consists of filter, for HDL generation and FPGA implementation. When I am simulating this model in Simulink, it works perfectly fine but when I use FPGA-in-the-loop it doesn't produce any results. There is some problem in setting simulation parameters and sampling time but I am not sure about it. Any help will be greatly appreciated. Thanks.

Answer 1

[Bharath Venkataraman]

Can you try just making the FPGA part a pass through to make sure that the FIl simulation is working? You may want to aslo look at the pixel and ctrl inputs and outputs to/from FIL to make sure that the FIL is being sent and is sending data.

[Vishal Deep]

Yes, It is working, when I tried inbuilt MATLAB examples it works fine. The only problem that I am facing is how to setup simulation time according to input image.