Supercapacitor

Electrochemical double-layer capacitor

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Libraries:
Simscape / Electrical / Passive

Description

The Supercapacitor block represents an electrochemical double-layer capacitor (ELDC), which is commonly referred to as a supercapacitor or an ultracapacitor. The capacitance values for supercapacitors are orders of magnitude larger than the values for regular capacitors. Supercapacitors can provide bursts of energy because they can charge and discharge rapidly.

You can model any number of supercapacitor cells connected in series or in parallel using a single Supercapacitor block. To do so, set the relevant parameter, that is Number of series cells or Number of parallel cells, to a value larger than 1. Internally, the block simulates only the equations for a single supercapacitor cell, but it calculates:

• The output voltage according to the number of series-connected cells

• The current according to the number of parallel-connected cells

Calculating the output of a multiple-cell supercapacitor based on the output for a single cell is more efficient than simulating the equations for each cell individually.

The figure shows the equivalent circuit for a single cell in the Supercapacitor block. The circuit is a network of resistors and capacitors that is commonly used to model supercapacitor behavior.

Capacitors C₁, C₂, and C₃ have fixed capacitances. The capacitance of capacitor C_v depends on the voltage across it. Resistors R₁, R₂, and R₃ have fixed resistances. The voltage across each individual fixed capacitor in the Supercapacitor block is calculated as

$$V_{cn}=\frac{v}{N_{series}}-i_n{R}_n,$$

where:

• v is the voltage across the block.

• N_series is the number of cells in series.

• n is the branch number. n = [1, 2, 3].

• i_n is the current through the nth branch.

• R_n is the resistance in the nth branch.

• V_cn is voltage across the capacitor in the nth branch.

The equation for the current through the first branch of the supercapacitor depends on the voltage across the capacitors in the branch. If the capacitors experience a positive voltage, that is

$$V_{c1}>0,$$

then

$$i_1=(C_1+K_v{V}_{c1})\frac{d{V}_{c1}}{dt},$$

else

$$i_1=C_1\frac{d{V}_{c1}}{dt},$$

where:

• V_c1 is voltage across the capacitors in the first branch.

• C₁ is the capacitance of the fixed capacitor in the first branch.

• K_v is the voltage-dependent capacitance gain.

• i₁ is the current through the first branch.

For the remaining branches, the current is defined as

$$i_n=C_n\frac{d{V}_{cn}}{dt},$$

where:

• n is the branch number. n =[2, 3].

• C_n is the capacitance of the nth branch.

The total current through the Supercapacitor block is

$$i=N_{parallel}\left(i_1+i_2+i_3+\frac{v}{R_{discharge}}\right),$$

where:

• N_parallel is the number of cells in parallel.

• R_discharge is the self-discharge resistance of the supercapacitor.

• i is the current through the supercapacitor.

Examples

Supercapacitor Charging and Discharging Behavior

The voltage output by a Supercapacitor block as it is charged and then discharged. To charge the Supercapacitor, a current of 100 mA is input to the Supercapacitor for 100 seconds. The Supercapacitor is then rested for one minute. For the next hour, to discharge the Supercapacitor, a load of 50 mA is stepped on for one second in every 50 seconds. The Supercapacitor is then rested until the end of the simulation. The scope displays the Supercapacitor charging/discharging current and voltage.

• Open Model

Identify Supercapacitor Parameter

Identify the parameters of a supercapacitor. Instead of collecting voltage and current waveforms from a real supercapacitor, this example generates voltage and current waveforms by running a simulation of a supercapacitor using known parameter values. Then the example applies a parameter identification methodology [1] to the waveforms.

• Open Live Script

Ports

Conserving

+ — Positive electrical terminal

electrical

Electrical conserving port associated with the positive terminal.

- — Negative electrical terminal

electrical

Electrical conserving port associated with the negative terminal.

Parameters

Cell Characteristics

Fixed resistances, [R1 R2 R3] — Fixed resistance values for each branch

[0.2, 90.0, 1000.0] Ohm (default)

Specify the resistances for the fixed resistors in the individual branches of the supercapacitor as an array.

Fixed capacitances, [C1 C2 C3] — Fixed capacitance values for each branch

[2.5, 1.5, 4.0] F (default)

Specify the individual capacitances for the fixed capacitors in the supercapacitor as an array.

Voltage-dependent capacitor gain — Variable capacitance coefficient for the first branch

0.95 F/V (default)

Specify the variable capacitance coefficient, K_v, for the voltage-dependent capacitor in the first branch of the supercapacitor. For information on determining the variable capacitance coefficient, see [1].

Self-discharge resistance — Resistance to self-discharge

inf (default)

Specify the self-discharge resistance of the supercapacitor that is connected between the two terminals.

Configuration

Number of series cells — Number of supercapacitor cells in series

1 (default)

Specify the number of cells in the supercapacitor that are in a series configuration.

Number of parallel cells — Number of supercapacitor cells in parallel

1 (default)

Specify the number of cells in the supercapacitor that are in a parallel configuration.

Variables

Beginning Value — Initial target value

0 (default)

Use the Variables tab to set the priority and initial target values for the block variables before simulation. For more information, see Set Priority and Initial Target for Block Variables.

References

[1] Zubieta, L. and R. Bonert. “Characterization of Double-Layer Capacitors for Power Electronics Applications.” IEEE Transactions on Industry Applications, Vol. 36, No. 1, 2000, pp. 199–205.

[2] Weddell, A. S., G. V. Merrett, T. J. Kazmierski, and B. M. Al-Hashimi. “Accurate Supercapacitor Modeling for Energy-Harvesting Wireless Sensor Nodes.” IEEE Transactions on Circuits And Systems–II: Express Briefs, Vol. 58, No. 12, 2011, pp. 911–915.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Version History

Introduced in R2016b