Why Use FPGAs for Motor Control

In this video, we provide an overview on how control engineers can use Simulink and implement their algorithms on FPGA hardware using MathWorks advanced Auto Code Generation tools. But why control engineers need to consider FPGA hardware? The growth in electrification, adoption of wide band gap materials, high-speed precision robots are among the reasons for this.

Power and motor control engineers are challenged with developing complex and computer heavy digital control circuits. Using digital control techniques, software control is implemented to manipulate the current flow, and engineers must come up with compute-intensive strategies at high frequencies in order to meet requirements. To deploy compute-intensive algorithms, engineers are considering system on chip devices, or SOC. SOC devices provide control engineers with familiar processor core with additional FPGA architecture. Control engineers understand the advantages and deterministic behavior of the FPGA, but lack the expertise in HDL programming or complex design tools.

Engineers at Punch Powertrain, in order to boost their Switched Reluctance Electric Motor from 70 kilowatt 130 kilowatt, developed new closed loop control strategies with fast and heavy calculations. To implement the fast switching controls, engineers needed paddle and high-speed processing capabilities, and wanted to utilize the Zynq SoC device. The engineers with no prior FPGA design experience were able to utilize MathWork's at once Auto Code Generation capability to target the FPGA architecture in the Zynq, and were able to successfully deliver the project in 1 1/2 years.

Control design algorithm engineers commonly use Simulink models early in the development process to gain confidence that their algorithms are functionally correct. Start with the conceptual closed loop model of a field oriented control of a permanent magnet synchronous machine. Engineers can use Simulink, Stateflow, and Simscape tools to create the behavioral model of the control algorithm and the plant model. From this controller model using MathWorks' Embedded Coder Tool, engineers can generate optimized C and C++ code for embedded targets. We will show you how you can extend this capability and generate HDL code to target the FPGA architecture on the SoC.

The code of the control algorithm is common knowledge to control engineers. The field oriented control is a current controller consisting of two proportional integral current controllers cascaded with an outer control loop of velocity. The mode logic or mode operations can be selected, such as velocity control, encoder calibration, open loop, disabled, enabled, et cetera.

The mode scheduler is followed by the conversion of engineering units at the peripherals, such as current positions, position velocity units, and voltage units. Traditionally, we would connect the processes encoder and PWM peripherals. But instead, we'll model and implement it on the FPGA, and even try and implement the integral current controllers on the FPGA.

Using the FPGA for the modulation schemes, you're no longer restricted by the processor's fixed PWM. This method enables compute-intensive control algorithm to run on the FPGA hardware while the supervisory system, system monitoring, and user interface are handled by the processor core. To find out more, watch the Getting Started video for deploying motor control algorithms on FPGA. We will show you how you can implement a field-oriented control on both the FPGA and processor of an SoC device using model-based design and code generation workflows to generate both C and HDL code.