Using FPGAs for power electronics control design
With the need for higher sampling frequencies, power electronics control engineers are moving some of their controller implementations to FPGAs or FPGA-based SoCs. Besides the use of wide-band gap semiconductors (GaN and SiC), what other reasons are driving the need for higher controller sampling frequencies? Let us know your thoughts.
3 Comments
Time Descending- FPGAs allow for generating more PWM signals than the peripherals of MCUs provide, as required by advanced topologies.
- The PWM signals can also be customized beyond the settings provided by the MCU's PWM peripheral.
- FPGAs allow using asynchronous logic for some sections of the design allowing for power saving and smaller delays.
- The design is way more portable! Don't have to adapt code such as when the MCU designer decides to change the operation of the PWM peripheral, in which case each time you have to restudy the datasheet and modify the code.
- Can do cool tricks on FPGA, e.g. make a ring oscillator for a counter, etc.
- and the list goes on and on...
Well-known fact is, Higher the control & switching frequency, better the harmonics, lower the inductor-size and cost.
Apart from controller in FPGA, filters and PWM in FPGA offers good advantages,
1. IIR filter in FPGA with ADC oversampling offers good resolution on filter coefficients. Higher the ratio between sampling frequency and cut-off frequency better the filter-coefficients resolution.
2. Running IIR filter in FPGA allows to design the filters programmatically without modifying the hardware for localization. One such example, in Switzerland street-lights on-off control is through 750 Hz powerline communication. This affects the PV inverters stability as 750 Hz is within the pass-band. If IIR filter is running in FPGA, add a notch filter to suppress the specific frequency without modifying the hardware or adding external additional filter.
3. Dynamic filter in FPGA allows grid stability control.
4. On PWM side, PWM-double-update is possible as FPGA can update the new duty value in second half-pwm-cycle with interpolated theta and newly calculated feed-forward value. This improves stability of the system.
I totally agree. The use of FPGAs is more common. At a recent power electronics conference in Nuremberg ( PCIM 2019 ), many companies like ABB, LEM, AixControl, and SEW Eurodrives presented power electronics articles using FPGAs.
Hardware-in-the-Loop (HIL) and Power HIL are also driving adoption of FPGA-based solutions. HIL is a validation and verification procedure of Model Based-Design that allows you to thoroughly test your control firmware earlier in a project and prevents damaging expensive hardware should the code have errors or you want to test at extreme conditions. In order to reproduce the high-frequency switching of power electronics components, real-time simulations typically need to run at hundreds of kHz or even MHz. That is currently only possible with FPGAs.