Flatten Hierachy for MATLAB functions used in SIMULINK when Generating HDL code
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Hi, I am using few MATLAB functions in my SIMULINK model and then generate an HDL code (Verilog in particular) from it. The problem I am having is that it generates different Verilog files for each function and I can't find an option to flatten the hierarchy for the functions. Is it possible to flatten the hierarchy for the functions?
Many Thanks, Kamyar