The short answer is no, HDL Coder cannot do this. This is because you are asking for hardware to look up two values at the same time. Since a ROM implementation on an FPGA has a single read port, the two reads must be serialized either in time or in space. HDL Coder is choosing space, in this case.
If space is a a premium, you need to feed your two array values sequentially to the lookup table. Then you'll get a single table, probably running at twice the clock rate, in order to deliver the two outputs within a single clock cycle.