How to use design verifier with incompatible simulink models?

I have a Simulink model with an integrator block that cannot be stubbed while running the design verifier, rendering the model incompatible with the design verifier. Is there a way to increase the coverage of such a model other than manually building test cases?

Answers (1)

Hi Tushar,
You will have to write your own block replacement rules to handle the unsupported blocks for SLDV. Please refer the following documentations for more information:
Thanks

Asked:

on 10 Jul 2016

Answered:

on 2 Mar 2025

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