launchpadXL F28379D interference between inputs of a same ADC

Hello,

============ Context

I'm using simulink with external mode to pilot a launchpadXL F28379D and I use a lot of ADC readings.

• ADC_C is used to measure 2 differencial inputs (C_IN2/IN3 and C_IN4/IN5) <=> These measurements present no issue
• ADC_B is used to measure 4 single ended-inputs (B2, B3, B4 and B5)
• ADC_A is used to measure 4 single ended-inputs (A2, A3, A4 and A5)
• My outputs are DAC-A, DAC-B and ePWM 1,2 and 3.

I've shared a model for ease of debugging : "Launchpad_Instanciation.slx".

============ Measurements

For the measurements I have the board by itsef and a DC power supply to test the PINs.

To confirm the proper operation of the ADC I input a voltage between the concerned PIN (+) and the board's GND (-). The issue appears when I test the measurements done with ADC_A and ADC_B. See "InterferenceBetweenADC.png".

In ADC_A

• when I input a voltage in A2, I have a input reading. The issue is that I also have a small reading in A3
• when I input a voltage in A3, I have a input reading. The issue is that I also have a small reading in A4
• when I input a voltage in A4, I have a input reading. The issue is that I also have a small reading in A5
• when I input a voltage in A5, I have a input reading. The issue is that I also have a small reading in A2

In ADC_B I have the same issue

• when I input a voltage in B2, I have a input reading. The issue is that I also have a small reading in B3
• when I input a voltage in B3, I have a input reading. The issue is that I also have a small reading in B4
• when I input a voltage in B4, I have a input reading. The issue is that I also have a small reading in B5
• when I input a voltage in B5, I have a input reading. The issue is that I also have a small reading in B2

============ Question

Why does an input voltage on a ADC's input would impact the "next" input of the same ADC?

I appreciate the time you took to read my issue and any help will be greatly appreciated.

Kind regards,

Answer 1

[Yashwanth]

Hi Bertrand,

One of the possible workaround resolution you can try is increasing "Acquisition Window", increase the ADC sample time so the S/H capacitor can settle.

In Simulink (ADC block):

• Increase Acquisition Window (ACQPS)
• Recommended starting point:
• ≥ 20–30 ADC clock cycles
• Even higher if source impedance > 1 kΩ