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Interprocess Data Channel

Model interprocessor data channel between two processors

  • Library:
  • SoC Blockset / Processor Interconnect

  • Block icon of interprocess data channel.

Description

The Interprocess Data Channel block simulates the interprocessor data channel available in multiprocessor or OS managed SoC hardware board families. The block provides a channel for asynchronous data transfer between two processors. This diagram shows a generalized view of the interprocessor data connection.

Limitations

In an SoC model, when Interprocess Data Channel blocks form a closed-loop between two or more tasks, it can create an artificial algebraic loop for the Simulink® solver. To break the loop, the Simulink solver implicitly adds a delay into the loop. This delay is related to an internal event and cannot be modified by the user, but the delay typically will be on the same order as the base time-step of the model. For more information on artificial algebraic loops in Simulink solvers, see Artificial Algebraic Loops.

Ports

Input

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This message port receives input data as a message from a connected Interprocess Data Write block. For more information on messages, see Messages.

Data Types: SoCData

Output

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This message port sends output data as a message to a connected Interprocess Data Read block. For more information on messages, see Messages.

Data Types: SoCData

This port sends a task event signal that triggers the Task Manager block to execute the associated event-driven task.

Dependencies

To enable this port, select the Show event port parameter.

Data Types: rteEvent

Parameters

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Enable an event port that, when connected to the Task Manager block, can execute event-driven tasks.

Introduced in R2020b