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Resolve Delays Not Absorbed During Delay Balancing

Issue

HDL Coder™ has several optimizations, block implementations, and options that add discrete latency into your generated model in the form of introduced Delay blocks. Latency along the critical path in a model can cause differences between the numerical calculations of the original model and the generated model or HDL code in certain time steps because equivalent delays are not introduced on other, parallel signal paths.

The delay balancing optimization applies delay absorption to your model, which introduces design delays in your model to absorb latency introduced upstream of the design delays. In certain situations, HDL Coder cannot automatically absorb all latency introduced in your generated code. The Delay Balancing section of the Code Generation report details any latency that is not absorbed during delay balancing. To resolve the non-absorbable latency, you can change the model configuration parameters, adjust the latency budget in the model, or make changes to the model design so that HDL code generation can absorb the latency.

For example, introduced latency in this model causes output Out1 and output Out2 to have different values during initialization time steps, even though the numerical calculations are the same after the initialization cycles:

Block diagram displaying a delay blocker

Possible Solutions

Update the Model Configuration Parameters

The Pipeline distribution priority model configuration parameter specifies the priority for the distributed pipelining and delay absorption optimizations. Setting Pipeline distribution priority to Performance allows distributed pipelining to move design delays in your generated model. Note that this can lead to validation model mismatches during initialization cycles.

Adjust the Latency Budget

You can model your design with latency to apply the delay absorption optimization that runs when you generate HDL code with delay balancing. For more information, see Use Delay Absorption While Modeling with Latency.

If you are modeling at data rate, the clock-rate pipelining report contains details on how to adjust the latency budget to your model. For more information, see Clock-Rate Pipelining Report.

If you are modeling at clock rate, you can increase the latency budget by adding design delays in feedback loops. For more information, see Understand Delay Balancing in HDL Coder.

Edit the Model

The Delay Balancing report details which model elements block delay absorption. Change your design to add Delay blocks upstream of the model elements that block delay absorption and set the number of delay cycles to be equal to the number of cycles of non-absorbable latency. To optimize speed, add the Delay block as closely upstream of the introduced latency as possible.

See Also

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