bitsll

Bit shift left logical

Syntax

c = bitsll(a, k)

Description

c = bitsll(a, k) returns the result of a logical left shift by k bits on input a for fixed-point operations. bitsll shifts zeros into the positions of bits that it shifts left. The function does not check overflow or underflow. For floating-point operations, bitsll performs a multiply by 2k.

bitsll ignores fimath properties such as RoundingMode and OverflowAction.

When a is a fi object, a and c have the same associated fimath and numerictype objects.

Examples

Shift Left a Signed fi Input

Shift a signed fi input left by 1 bit.

Create a fi object, and display its binary value.

a = fi(10,0,4,0);
disp(bin(a))

1010

Shift a left by 1 bit, and display its binary value.

disp(bin(bitsll(a,1)))

0100

Shift a left by 1 more bit.

disp(bin(bitsll(a,2)))

1000

Shift Left Using a fi Shift Value

Shift left a built-in int8 input using a fi shift value.

k = fi(2);
a = int8(16);
bitsll(a,k)

ans = int8

64

Shift Left a Built-in int8 Input

Use bitsll to shift an int8 input left by 2 bits.

a = int8(4);
bitsll(a,2)

ans = int8

16

Shift Left a Floating-Point Input

Scale a floating-point double input by $$2^3$$.

a = double(16);
bitsll(a,3)

ans = 
128

Input Arguments

a — Data that you want to shift

scalar | vector | matrix | multidimensional array

Data that you want to shift, specified as a scalar, vector, matrix, or multidimensional array of fi objects or built-in numeric types.

Data Types: fi | single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64

Complex Number Support: Yes

k — Number of bits to shift

non-negative integer-valued scalar

Number of bits to shift, specified as a non-negative integer-valued scalar fi object or built-in numeric type.

Data Types: fi | single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using MATLAB® Coder™.

Usage notes and limitations:

• Generated code might not handle out of range shifting.

GPU Code Generation

Generate CUDA® code for NVIDIA® GPUs using GPU Coder™.

Usage notes and limitations:

• Generated code might not handle out of range shifting.

HDL Code Generation

Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

Generates sll operator in VHDL^® code.

Generates << operator in Verilog^® code.

Version History

Introduced in R2007b