Getting Started with the Avnet ZUBoard, Part 4: Program the Design onto an FPGA Using Vivado
From the series: Getting Started with the Avnet ZUBoard
Synthesize, implement, and program a FIR filter onto the Avnet® ZUBoard hardware using AMD-Xilinx® Vivado® Design Suite. Target a specific FPGA device and perform place-and-route. Specify how input and output signals are assigned to package pins. Rerun the simulation and make sure performance meets design guidelines. Lastly, create a final bitstream file and program the FIR filter onto ZUBoard hardware.
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