Processor Algorithm Wrapper Not Triggered on ZCU208 RFSoC Hardware

Hi,

I am trying to run a Simulink model on a ZCU208 RFSoC board to transmit and receive FMCW signals. The model works correctly in simulation, and I am able to observe both the transmitted and received signals. However, after deploying the model to the hardware, I do not receive any output. While debugging, I noticed that the Processor Algorithm Wrapper does not appear to be triggered or executed. I tried changing the mean, minimum, and maximum task duration values in the Task Manager, since it is responsible for calling the algorithm wrapper, but the wrapper still does not seem to run. I also tried sending constant values instead of the received signal and modifying the AXI4-Stream to Software block settings, but I still do not get any output. What could prevent the Task Manager from triggering the Processor Algorithm Wrapper on the hardware, and what settings or diagnostics should I check to confirm whether the processor algorithm is being called correctly? I am using MATLAB/Simulink R2025b with SoC Blockset and a ZCU208 RFSoC board.

Thank you.

Answer 1

[Ishan]

In this workflow, the Processor Algorithm Wrapper is typically triggered by the event generated through the AXI4-Stream to Software DMA path. Changing the mean/min/max task duration values in the Task Manager does not generate a hardware trigger and therefore would not cause the wrapper to execute on the target.

If the processor task is event-driven, I would verify that the AXI4-Stream to Software channel is receiving valid data and generating the expected task event. In particular, check:

• Task Manager mapping to the correct event source.
• AXI4-Stream to Software frame configuration (frame size, data type, samples per frame).
• AXI4-Stream handshake and framing signals, especially whether transfers complete as expected.
• DMA and interrupt connectivity between the FPGA fabric and processor.
• Clocking and reset configuration for the RFDC and associated logic.

As a diagnostic, try adding a simple counter or status indicator inside the Processor Algorithm Wrapper to confirm whether it is ever entered on the target.

Since the model works in simulation, I would focus first on whether the AXI4-Stream → DMA → Task Manager event chain is completing successfully. If the transfer never completes, the processor algorithm may never be triggered.