Is there a way to increase the default ping timeout time for MATLAB Ethernet AXI manager for Xilinx FPGA?

Is there a way to increase the default ping timeout time for MATLAB Ethernet axi manager? Ethernet is so delicate that sometimes it can fail to ping quickly. But unfortunately MATLAB throws a timeout error quickly. Now if you are running a long experiment, and suddenly it gets timed out, it is very bad and sad. Rather we could wait longer for that Ethernet to ping.

So, my question is: is there a way to increase the default ping timeout time for MATLAB Ethernet AXI manager for Xilinx FPGA? If not, can we come up with a workaround?

Answer 1

[Abhishek Kumar Singh]

Hi @Nadatimuj,

I don't think there is a direct way to increase the default ping timout time through its built-in settings.

A workaround you can achieve by creating a custom ping function that retries the connection multiple times before giving up.

Here's a sample implementation of one such function:

function success = customPing(ipAddress, maxRetries, timeout)
    % customPing - Custom ping function with retry logic
    % 
    % ipAddress - The IP address to ping
    % maxRetries - Maximum number of retries
    % timeout - Timeout for each ping attempt in seconds

    success = false;
    retryCount = 0;
    
    while retryCount < maxRetries
        try
            % Attempt to ping the IP address
            [status, ~] = system(sprintf('ping -n 1 -w %d %s', timeout * 1000, ipAddress));
            if status == 0
                success = true;
                fprintf('Ping successful on attempt %d\n', retryCount + 1);
                return;
            else
                retryCount = retryCount + 1;
                fprintf('Ping failed on attempt %d, retrying...\n', retryCount);
                pause(1); % Wait a bit before retrying
            end
        catch ME
            fprintf('Error during ping: %s\n', ME.message);
            retryCount = retryCount + 1;
            pause(1); % Wait a bit before retrying
        end
    end
    
    if ~success
        fprintf('Failed to ping %s after %d attempts\n', ipAddress, maxRetries);
    end
end

You can use the above function before starting your work to ensure the connection is stable:

ipAddress = '192.168.1.100'; % Replace with your FPGA's IP address
maxRetries = 10; % Number of retries
timeout = 5; % Timeout for each ping attempt in seconds

if customPing(ipAddress, maxRetries, timeout)
    disp('Connection is stable, starting the experiment...');
    % Your code to start the experiment
else
    disp('Connection could not be established, aborting the experiment.');
    % Handle the failure case
end

Hope it helps!

[Nadatimuj]

Thanks for the suggestion! Yeah I also ended up doing something similar with chatGPT. Pasting it here. But hopefully MATLAB will consider adding custom ping time.

initalization:

% Initialize AXI managers for the FPGAs, retry if fails to ping
fpga_memories = cell(1, num_partitions);
for i = 1:num_partitions
    fpgaID = i;
    success = false;
    attempts = 0;
    while ~success && attempts < max_PingRetries
        try
            fpga_memories{i} = aximanager('Xilinx', 'interface', 'PLEthernet', ...
                'DeviceAddress', ['192.168.0.', num2str(fpgaID)], ...
                'Port', num2str(50100 + fpgaID));
            success = true;
        catch
            attempts = attempts + 1;
            fprintf('AXI manager creation attempt %d for FPGA %d failed. Retrying...\n', attempts, fpgaID);
        end
    end
    if ~success
        error('Failed to create AXI manager for FPGA %d after %d attempts, please reprogram.', fpgaID, max_PingRetries);
    end
end

read/write:

%% Functions to retry read/write if Ethernet fails to ping
function writememory_with_retry(fpga_mem, address, data, burstType, maxRetries, fpgaID)
    success = false;
    attempts = 0;
    while ~success && attempts < maxRetries
        try
            writememory(fpga_mem, address, data, 'BurstType', burstType);
            success = true; % If no error occurs, the operation is successful
        catch
            attempts = attempts + 1;
            fprintf('Write memory attempt %d to FPGA %d failed. Retrying...\n', attempts, fpgaID);
        end
    end
    if ~success
        error('Failed to write to FPGA %d after %d attempts, please reprogram.', fpgaID, maxRetries);
    end
end

function data = readmemory_with_retry(fpga_mem, address, numWords, burstType, maxRetries, fpgaID)
    success = false;
    attempts = 0;
    while ~success && attempts < maxRetries
        try
            data = readmemory(fpga_mem, address, numWords, 'BurstType', burstType);
            success = true; % If no error occurs, the operation is successful
        catch
            attempts = attempts + 1;
            fprintf('Read memory attempt %d from FPGA %d failed. Retrying...\n', attempts, fpgaID);
        end
    end
    if ~success
        error('Failed to read from FPGA %d after %d attempts, please reprogram.', fpgaID, maxRetries);
    end
end