# SM AC4C

Discrete-time or continuous-time synchronous machine AC4C excitation system including an automatic voltage regulator and an exciter

*Since R2020a*

**Libraries:**

Simscape /
Electrical /
Control /
SM Control

## Description

The SM AC4C block implements a synchronous machine type AC4C excitation
system model in conformance with IEEE 421.5-2016^{[1]}.

Use this block to model the control and regulation of the field voltage of a synchronous machine that operates as a generator using an AC rotating exciter.

You can switch between continuous and discrete implementations of the block by using the
**Sample time (-1 for inherited)** parameter. To configure the
integrator for continuous time, set the **Sample time (-1 for
inherited)** property to `0`

. To configure the integrator
for discrete time, set the **Sample time (-1 for inherited)** property
to a positive, nonzero value, or to `-1`

to inherit the sample time
from an upstream block.

The SM AC4C block is made up of four major components:

The Current Compensator modifies the measured terminal voltage as a function of terminal current.

The Voltage Measurement Transducer simulates the dynamics of a terminal voltage transducer using a low-pass filter.

The Excitation Control Elements component compares the voltage transducer output with a terminal voltage reference to produce a voltage error. This voltage error is then passed through a voltage regulator to produce the exciter field voltage.

The AC Rotating Exciter models the AC rotating exciter, which produces a field voltage that is applied to the controlled synchronous machine. The block also feeds the exciter field current (which is given the standard symbol

*V*) back to the excitation system._{FE}

This diagram shows the overall structure of the AC4C excitation system model:

In the diagram:

*V*and_{T}*I*are the measured terminal voltage and current of the synchronous machine._{T}*V*is the current-compensated terminal voltage._{C1}*V*is the filtered, current-compensated terminal voltage._{C}*V*is the reference terminal voltage._{REF}*V*is the power system stabilizer voltage._{S}*E*and_{FE}*V*are the exciter field voltage and current, respectively._{FE}*E*and_{FD}*I*are the field voltage and current, respectively._{FD}

The following sections describe each of the major parts of the block in detail.

### Current Compensator and Voltage Measurement Transducer

The current compensator is modeled as:

$${V}_{C1}={V}_{T}+{I}_{T}\sqrt{{R}_{C}^{2}+{X}_{C}^{2}},$$

where:

*R*is the load compensation resistance._{C}*X*is the load compensation reactance._{C}

The voltage measurement transducer is implemented as a Low-Pass
Filter block with time constant
*T _{R}*. Refer to the documentation for
this block for the discrete and continuous implementations.

### Excitation Control Elements

This diagram illustrates the overall structure of the excitation control elements:

Contrary to the other AC excitation models, the SM AC4C block includes a full thyristor bridge that models the exciter output circuit and a voltage regulator that controls the firing of the thyristor bridges. Rather than having a rate feedback, the excitation system stabilization is implemented through a lead-lag network and low-pass filter.

In the diagram:

The Summation Point Logic subsystem models the summation point input location for the overexcitation limiter (OEL), underexcitation limiter (UEL), and stator current limiter (SCL) voltages. For more information about using limiters with this block, see Field Current Limiters.

The Lead-Lag block models additional dynamics associated with the voltage regulator. Here,

*T*is the lead time constant and_{C}*T*is the lag time constant. Refer to the documentation for the Lead-Lag block for the discrete and continuous implementations._{B}The Take-over Logic subsystem models the take-over point input location for the OEL, UEL, and SCL voltages. For more information about using limiters with this block, see Field Current Limiters.

The Low-Pass Filter block models the major dynamics of the voltage regulator. Here,

*K*is the regulator gain and_{A}*T*is the major time constant of the regulator. The minimum and maximum anti-windup saturation limits for the block are_{A}*V*and_{Rmin}*V*, respectively._{Rmax}The bottom part of the diagram models the

*Ifd*-based limitations.

### Field Current Limiters

You can use various field current limiters to modify the output of the voltage regulator under unsafe operating conditions:

Use an overexcitation limiter to prevent overheating of the field winding due to excessive field current demand.

Use an underexcitation limiter to boost field excitation when it is too low, which risks desynchronization.

Use a stator current limiter to prevent overheating of the stator windings due to excessive current.

Attach the output of any of these limiters at one of these points:

The summation point as part of the automatic voltage regulator (AVR) feedback loop

The take-over point to override the usual behavior of the AVR

If you are using the stator current limiter at the summation point,
use the single input *V _{SCLsum}*. If you are
using the stator current limiter at the take-over point, use both the overexcitation
input,

*V*, and the underexcitation input,

_{OELscl}*V*.

_{UELscl}## Ports

### Input

### Output

## Parameters

## References

[1] *IEEE Recommended
Practice for Excitation System Models for Power System Stability
Studies.* IEEE Std 421.5-2016. Piscataway, NJ: IEEE-SA,
2016.

## Extended Capabilities

## Version History

**Introduced in R2020a**