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Debug Integer Overflow Design Error Detection Using Model Slicer

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This example shows how to use Model Slicer to debug integer overflow design errors in a Simulink® model.

Prerequisites

This example uses the following products to demonstrate debugging the Design Error Detection violations:

  • Simulink Design Verifier™

  • Simulink Check™ (Model Slicer)

Example

1. Open model sldvdemo_design_error_detection.

open_system('sldvdemo_design_error_detection');

2. Open Simulink Design Verifier by clicking on Apps > Design Verifier.

3. In the Design Verifier tab, click Detect Design Errors. Simulink Design Verifier analyzes the model and displays the results in Results Summary window.

The model highlights the subsystem where the failed objectives are located.

4. Open Controller subsystem and select either of the blocks that are highlighted in red.

5. In the Results window, click Debug to debug the violation using Model Slicer. Alternatively, in the Design Verifier tab, click Review Results > Debug using Slicer to debug the violation using Model Slicer.

On clicking either of the entry points for debugging, the following setup is done on the model:

  • The selected block with a failed objective is added as a starting point for Model Slicer.

  • The model is highlighted with the slice responsible for the failing objective.

  • The design model is simulated and paused at the time of violation.

6. Debug and analyze the model by inspecting the port labels.

Tip: Click on the output signal line of the Sum block to enable the port value label for the block.

You can observe that the sum of the input variables should result in a non-zero number.

7. Investigate the input and output data types of the sum block.

Here, the datatype conversion results in the integer overflow. The datatype for inputs is ufix16_En8, which have a maximum value of 255.9961, whereas the datatype for output block is sfix16_En8, which has a maximum of 127.9961. In the counterexample the value is between these two values. The overflow happens when the sum block (without saturation) first casts the input values down to its output type and then does the arithmetic operation.

Verification

To confirm that the integer overflow error was resolved, on the Design Verifier tab, click Detect Design Errors. After the analysis completes, the software reports that all the objectives are valid.

Additional Capabilities

You can use the workflow demostrated in this example to debug the other Design Error Detection violations using Model Slicer. Following are the design errors supported:

  • Division by zero

  • Integer Overflow

  • Non-Finate and NaN (Not a Number) floating-point values

  • Specified minimum and maximum value violations

  • Datastore access violations

  • Specified block input range violations