Simulink Models of PLLs and Data Converters

Validate PLL, ADC, and DAC systems and measure key performance metrics in Simulink^®

Use the measurement blocks to analyze performance metrics such as phase noise, reference and fractional spurs, aperture jitter, timing impairments, and lock time in PLL systems in Simulink. You can also measure aperture jitter, SNR, SINAD, noise floor, offset error, and gain error in data converters. Use block-specific testbenches to validate your customized blocks.

To analyze PLLs and data converters in MATLAB^®, see MATLAB Analysis of PLLs and Data Converters.

Blocks

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PLL

Lock Time Measurement	Measure time a PLL takes to reach target frequency within given tolerance
Phase Noise Measurement	Compute phase noise at specific frequency offset vectors
PFD and Charge Pump Testbench	Generic test environment for phase/frequency detectors and charge pumps
VCO Testbench	Validate voltage controlled oscillator (VCO) by measuring phase noise metrics or VCO characteristics
PLL Testbench	Validate PLL system by measuring operating frequency, lock time, and phase noise

Data Converter

ADC AC Measurement	Measure AC performance metrics of ADC output
ADC DC Measurement	Measure DC performance metrics of ADC output
ADC Testbench	Measures DC and AC performance metrics of ADC output
DAC DC Measurement	Measure DC performance metrics of DAC output
DAC AC Measurement	Measure AC performance metrics of DAC output
DAC Testbench	Measure DC and AC performance metrics of DAC output

Topics

Compute Phase Noise Measurements Using Spectrum Analyzer
Learn how to obtain phase noise measurements of signals using the Spectrum Analyzer block.

Featured Examples

50x PLL Frequency Synthesizer Behavior Study and Measurements

Different measurements and scopes available to study the behavior of a PLL (phase-locked loop). In this example, the 1 MHz reference frequency of the PLL is multiplied by an integer (50).This drives to VCO output to 50 MHz.

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PLL With Dual Modulus Prescaler

How a PLL (phased locked loop) model works with a dual modulus prescaler frequency divider.

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Measuring Offset and Gain Errors in ADC

How offset error and gain error are calculated and how each affects the transfer curve of an ADC. Offset error and gain error characterize part of the linearity error in an ADC.

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ADC Linearity Measurement Using Histogram

Statistical measurement of ADC Linearity is popular in physical systems due to its noise tolerance and relative simplicity of implementation in a physical environment. This example covers problems inherent to statistical linearity measurements and some possible solutions for implementing these measurements in Simulink®.

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Third Order Delta Sigma ADC

Model a 3rd order Delta Sigma ADC and measure its performance using the ADC AC Measurement block. This ADC model consists of a behavioral model of a delta sigma ADC that uses a 3rd order feedforward modulator. The ADC input sample rate is 64 MHz and after decimating filters, the output sample rate is 1 MHz.

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