Validate PLL system by measuring operating frequency, lock time, and phase noise
Mixed-Signal Blockset / PLL / Measurements & Testbenches
The PLL Testbench block provides input stimulus in the form of a clock signal to a phase-locked loop (PLL) system. The testbench also validates the performance of the PLL system by comparing the operating frequency, lock time, and phase noise against the target metrics.
The PLL Testbench block generates the stimulus to drive the device under test (DUT) from the Stimulus tab. The setup parameters for validating the DUT are defined in the Setup tab and the target validation metrics are defined in the Target Metric tab.
Fractional N PLL with Analog Compensation | Fractional N PLL with Delta Sigma Modulator | Integer N PLL with Dual Modulus Prescaler | Integer N PLL with Single Modulus Prescaler