When simulating or running a model on the target hardware, you may face problems due to errors in the software architecture of a model. These errors can affect the performance of control algorithm and increase the code execution time on the hardware.
Verify the base rates and other execution rates of the model by using Debug > Information Overlays > Sample Time > Colors. The different sample times of the model decide the execution of different tasks in the simulation and in the generated code.
Verify that there are no overruns beyond the available sample time. Algorithms with overruns affect the control system stability. If required, optimize the model for code execution. For more details, see Code Verification and Profiling Using Processor-In-the-Loop Testing.
Verify that the low-priority interrupt service routines (ISR) (for example, speed control loop and communication service routines) are executed according to the design and are not ignored by any overruns in the high-priority ISRs.
Check that the model uses a correct execution order priority. Verify that all the interrupts are configured correctly.
To allow the analog circuits to get ready, check that the software initialization delay (for example, ADC blanking time, PWM driver, and charge pump) is greater than the required value specified by the manufacturer (for example, 2µs).
Verify that you initialized the target hardware and inverter correctly. Generally, the driver is disabled, which brings all the switches to a high impedance state and initializes the important variables to the default values.
Verify that you are using the recommended versions of the third-party tools. Check that bugs in the third-party software do not cause regressions.