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not, ~

Find logical NOT




~A returns a logical array of the same size as A. The array contains logical 1 (true) values where A is zero and logical 0 (false) values where A is nonzero.

not(A) is an alternate way to execute ~A, but is rarely used. It enables operator overloading for classes.


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Create a 3-by-3 identity matrix.

A = eye(3)
A = 3×3

     1     0     0
     0     1     0
     0     0     1

Find the logical negation of A. The new matrix has type logical.

B = ~A
B = 3x3 logical array

   0   1   1
   1   0   1
   1   1   0

Execute code based on a condition using the logical not operator in the context of an if loop.

Create a logical variable A.

A = false;

Use A to write an if/else code block. Wrap the if/else block in a for loop so that it executes four times.

for k = 1:4
    if ~A
        disp('IF block')
        A = true;
        disp('ELSE block')
IF block
ELSE block
ELSE block
ELSE block

On the first iteration, A is false, so the if block executes since ~A is true. However, the if block also changes the value of A to true. In the remaining iterations, ~A is false and the else block executes.

Input Arguments

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Input array, specified as a numeric scalar, vector, matrix, or multidimensional array.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | logical | char
Complex Number Support: Yes


  • You also can use the ~ symbol as a placeholder output argument in a function call. For example, [~,i] = max(A) suppresses the first output of the max function, returning only the indices of the maximum values. For more information, see Ignore Inputs in Function Definitions.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using MATLAB® Coder™.

GPU Code Generation
Generate CUDA® code for NVIDIA® GPUs using GPU Coder™.

HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

Introduced before R2006a