Component Verification

Verify the generated TLM component

Model Configuration Pane: TLM Generator / TLM Testbench

Description

Click Verify TLM Component to verify the generated TLM component. The software then performs the following actions:

  • Builds the generated code using make and generated makefiles.

  • Runs Simulink® to capture input stimulus and expected results.

  • Converts the Simulink data to TLM vectors.

  • Runs the standalone SystemC™/TLM testbench executable.

  • Converts the TLM results back to Simulink data.

  • Performs a data comparison.

  • Generates a Figure window for any signals that had data miscompares.

Dependencies

To enable this button, you must have previously generated code for your model, as well as a testbench. Generate testbench must be selected.

Settings

Verify TLM Component

Verifies TLM Component.

Programmatic Use

Parameter:
Type:
Values:
Default:

Version History

Introduced in R2010a

See Also