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Check for blocks and block settings overview

These checks verify whether blocks in your model are supported for HDL code generation, and whether the supported blocks have HDL-compatible settings. You can verify whether:

  • There are source blocks with infinite sample time in your model.

  • The blocks in your Simulink model are compatible for HDL code generation.

  • There are unconnected lines, input ports, or output ports in your model.

  • There are unresolved or disabled library links.

  • MATLAB Function and Stateflow® Chart blocks in your model have HDL-compatible settings.

  • There are Delay, Unit Delay, and Zero-Order Hold blocks in the model that perform rate transition and replace them with Rate Transition blocks.