Modeling

R2026b

Prepare model for deployment to hardware, add blocks to support hardware

The HDL Coder™ Support Package for Intel^® FPGA and SoC Devices provides a library of Simulink^® blocks and model configurations specific to the Altera^® SoC devices.

Blocks

	AXI4 Read	Read data from IP core on target hardware through the AXI4-Lite interface
	AXI4 Write	Write data to IP core on the target hardware through AXI4-Lite interface
	Linux Task	Spawn task function as separate Linux thread
	UDP Receive	Receive UDP data
	UDP Send	Send UDP message

Functions

alterasoclib Open the Simulink Library Browser to the HDL Coder Support Package for Intel FPGA and SoC Devices block library

Topics

Embedded Target Features for Altera SoC Platform
Supported features for Altera SoC platform.

Apps

Run on Hardware Board - Altera SoC Devices

Build, deploy, and run models on connected hardware boards

Model Settings

Hardware Implementation Pane: Arria 10, Cyclone V, or Arrow SoCKit

Featured Examples

Parameter Tuning with External Mode Simulation

Run a Simulink® model in external mode on the ARM® Cortex®-A processor in an Intel® SoC device.

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Get Started With Code Generation Using HDL Coder Support Package for Intel FPGA and SoC Devices

Use HDL Coder® Support Package for Intel® FPGA and SoC Devices to run a Simulink® model on an Intel SoC device.

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