MISRA C:2012 Rule 21.25
All memory synchronization operations shall be executed in sequentially consistent order
Since R2025a
Description
Rule Definition
All memory synchronization operations shall be executed in sequentially consistent order.1
Rationale
The C standard defines memory_order_seq_cst
as the default memory
order for _Atomic
objects. Using this ordering enables sequential
consistency. Behavior of other nondefault memory orders can be inconsistent depending on the
environment, resulting in code that is not portable. If your code does not use
memory_order_seq_cst
to execute memory synchronization operations in a
consistent order, the code might compile but its behavior can be unexpected and
error-prone.
For consistent and portable code, use library functions that use the memory order
memory_order_seq_cst
implicitly. When specifying the memory order
explicitly, use only memory_order_seq_cst
. Using other memory orders such
as memory_order_acquire
with functions that expect the memory order
memory_order_seq_cst
results in undefined behavior.
Polyspace Implementation
Polyspace® reports a violation of this rule if a function from the C standard uses a
memory ordering other than memory_order_seq_cst
.
Violations are reported when the memory order is specified macros that define memory
ordering other than memory_order_seq_cst
.
Troubleshooting
If you expect a rule violation but Polyspace does not report it, see Diagnose Why Coding Standard Violations Do Not Appear as Expected.
Examples
Check Information
Group: Standard libraries |
Category: Required |
AGC Category: Required |
Version History
Introduced in R2025a
1 All MISRA coding rules and directives are © Copyright The MISRA Consortium Limited 2021.
The MISRA coding standards referenced in the Polyspace Bug Finder™ documentation are from the following MISRA standards:
MISRA C:2004
MISRA C:2012
MISRA C:2023
MISRA C++:2008
MISRA C++:2023
MISRA and MISRA C are registered trademarks of The MISRA Consortium Limited 2021.