ETRI used Model-Based Design with MATLAB® and Simulink® to design the modem synchronization algorithm for both the transmitter and receiver. They modeled and simulated the system and verified the HDL code before implementation on the FPGA.
Using frame-based processing and the multirate sampling capabilities of Simulink and DSP System Toolbox™ enabled us to model a system that was very close to the actual hardware implementation," Lee notes.
ETRI engineers used Simulink to develop their floating-point model. They incorporated legacy C code into the model using Simulink S-functions and designed the model’s variables with MATLAB.
They accelerated their system design using a variety of signal processing techniques in Signal Processing Toolbox™ and DSP System Toolbox and graphical plots, channel models, and other communications algorithms in Communications Toolbox™.
"MathWorks tools provide a rich library of blocks and functions that give us a head start in designing our system," says Lee.
Using Fixed-Point Designer™, ETRI then specified all the fixed-point data type properties of the design by easily modifying their existing floating-point models.
"Moving from floating point to fixed point was very easy," says Lee. "Simulink makes that process painless."
After they completed the HDL coding for the receiver, ETRI used the fixed-point model as an executable specification to verify their code before implementation on a Xilinx Virtex®-II FPGA.
"To verify the HDL implementation of the receiver, we generated a transmitter signal using an existing Simulink model. This stimulus generated using the Simulink model included a modulated signal and channel effects, such as fading," explains Lee. "Using MathWorks products, we quickly generated near-real data to verify the HDL implementation."
ETRI successfully completed the development of the prototype and demonstrated its capabilities. They are continuing to use MathWorks tools to increase the data rate and coverage of the system.