Xishan Develops Innovative 3D Reconstruction– and FPGA-Based Prototyping for Endoscopy
Vision HDL Toolbox Accelerates Rapid Prototyping on Embedded Hardware
“We directly generate standard code with HDL Coder. Then, according to the scenario of our application, we will make appropriate adjustments and optimizations.”
Key Outcomes
- Model-Based Design enabled FPGA-based fast prototyping in the development and implementation of image processing algorithms
- Blocks and examples in Vision HDL Toolbox enhanced modeling efficiency, simplifying the implementation of vision algorithms on FPGA
- Simulink helped the team deploy algorithm models based on hardware chip architecture
- HDL Coder rapidly and automatically generated code for quick experiment, iteration, and verification
Chongqing Xishan Science & Technology Co., Ltd., is a leading provider of minimally invasive surgical equipment and consumables. One such tool—the endoscope—is a medical device that enters the human digestive tract through small incisions or natural cavities to visualize and operate on internal body organs.
With binocular camera–based 3D reconstruction, surgeons have a more vivid view of the nidus. However, binocular cameras occupy more space in the imaging channel of the endoscope. The Xishan team wanted to explore a novel monocular vision–based polarization 3D reconstruction algorithm. To do so, they needed to conduct real-time rapid prototyping and debugging in actual endoscopic environments based on an FPGA. Additionally, they needed to fine-tune the algorithm’s implementation in surgical scenarios based on the real-time hardware prototype. However, manual HDL coding for FPGA real-time prototyping and iterative debugging would be time-consuming and inefficient.
To address these challenges, Xishan decided to integrate computational imaging into the device’s optical system. Using MATLAB® for algorithm development, along with Simulink® and Vision HDL Toolbox™ for modeling, the team developed various imaging algorithms over two years. They used HDL Coder™ to automatically generate standardized and readable code with detailed reports from MATLAB models. Finally, Simulink was used to quickly deploy the image processing algorithm models.
The HDL workflow for the image processing pipeline can be deployed onto the embedded hardware. Additionally, 3D-precision computational image generation through a simple optical system confirmed the prototyping, development, and deployment of imaging algorithms to an FPGA.
