This three-day course will review DSP fundamentals from the perspective of implementation within the FPGA fabric. Particular emphasis will be given to highlighting the cost, with respect to both resources and performance, associated with the implementation of various DSP techniques and algorithms. Topics include:
|Day 1 of 3|
|Introduction to DSP FPGA Hardware||
Objective: Provide introduction to DSP and FPGA. Understand general FPGA architecture and why FPGAs are uniquely suited to the implementation of DSP algorithms.
|Linear Systems DSP Algorithm Review||
Objective: Review fundamental concepts of sampling theorem, quantization, Fourier analysis and digital filter design.
Objective: Explore different Xilinx FPGA families and architectures. Provide introduction to Spartan 3 and Virtex-5 FPGAs.
|FPGA elements for DSP algorithms||
Objective: Understand DSP slices, clocking resources and power consumption.
|DSP Arithmetic Essentials||
Objective: Understand fixed point binary arithmetic. Map arithmetic operations to Xilinx FPGA hardware.
|Signal Flow Graph (SFG) Techniques||
Objective: Review the representation of DSP algorithms using signal flow graph. Use the Cut Set method to improve timing performance. Implement parallel and serial FIR filters.
|Day 2 of 3|
|Frequency Domain Processing||
Objective: Discuss the theory and FPGA implementation of the Fast Fourier Transform.
|Multirate Signal Processing for FPGAs||
Objective: Develop polyphase structure for efficient implementation of multirate filters. Use CIC filter for interpolation and decimation.
Objective: Introduce CORDIC algorithm for calculation of various trigonometric functions.
|Day 3 of 3|
|Adaptive DSP Algorithms and Applications||
Objective: Introduce LMS algorithm in adaptive signal processing. Illustrate QR algorithm as a Recursive Least Squares (RLS) technique and why it is particularly suited to FPGA implementation.
|DSP Enabled Communications and FPGAs||
Objective: Review quadrature modulation and pulse-shaping. Discuss implementation of numerically controlled oscillators.
|Timing and Synchronisation Issues||
Objective: Cover symbol timing recovery, carrier phase recovery, carrier frequency recovery and frame synchronization.
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