Dominique Görner
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Content Feed
Question
HDLCoder timing closure errors on hps2fpga brigde when scaling up a model.
Im trying to scale up a motor control algorithm from 1 controller to 4 instances on HDLCoder in 2018b. The Plattform is a Cyclon...
3 years ago | 2 answers | 0
2
answersQuestion
Implementation Latency of Blackbox Subsystem when using oversampling
I have a Data Aquisition Module written in VHDL and inserted into Simulink via a DocBlock Blackbox Subsystem.(Matlab 2018a) The...
4 years ago | 3 answers | 0
3
answersQuestion
Exclude Signal from Delay Balancing
I have a DocBlock based Blackbox implementation for IO Communication in a HDL Coder Simulink Project. It requires direct GPIO C...
4 years ago | 1 answer | 0
1
answerQuestion
Required Linux image / utilitys for IntelSoC custom boards
Im trying to get the HDL Coder/Embedded Coder Co-Demo "hdlcoder_led_blinking" working with a custom board: DE0-nano-SoC/Atlas So...
4 years ago | 1 answer | 0
1
answer
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