Main Content


Create bitstream containing user programming and download it to Xilinx® FPGA and SoC devices

The Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC Devices enables you to deploy your custom series deep learning network, and custom deep learning processor IP on the hardware.


Prototype Deep Learning Networks on FPGA and SoCs Workflow

Accelerate the prototyping, deployment, design verification, and iteration of your custom deep learning network running on a fixed bitstream by using the dlhdl.Workflow object.

Bitstream Resource Utilization

Estimate resource utilization for shipping bitstreams.

Featured Examples