SoC Blockset™ enables the simulation and evaluation of shared memory transactions in Simulink®. Visualize post-simulation performance and bandwidth metrics before deploying to SoC device by using the Logic Analyzer app.
|Memory Channel||Stream data through a memory channel|
|Memory Controller||Arbitrate memory transactions for one or more Memory Channel blocks|
|Memory Traffic Generator||Generate traffic towards memory controller|
|Register Channel||Timing model for transfer of register values|
|IP Core Register Read||Model register writes from software to hardware|
|Interrupt Channel||Send interrupt to processor from hardware|
|Logic Analyzer||Visualize, measure, and analyze transitions and states over time|