Customize generated SystemVerilog code
Choice to customize the generated SystemVerilog code
Model Configuration Pane: SystemVerilog DPI / SystemVerilog Code Customization
Description
Indicate that you want to customize the generated SystemVerilog code.
Dependencies
You must enter a template file in Source file template: if you want the generator to include customized code.
Settings
off (default) | onDefault: Off
On Customize generated SystemVerilog code
OffDo not customize generated SystemVerilog code
Programmatic Use
Parameter:
DPICustomizeSystemVerilogCode |
| Type: |
Values:off|on
|
Default:
off |
Version History
Introduced in R2013b
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